Computer Architecture And Organization MCQ
1. Which operations are used for addition, subtraction, increment, decrement and complement function:
a. Bus
b. Memory transfer
c. Arithmetic operation
d. All of these
2. The method of writing symbol to indicate a provided computational process is called as a:
a. Programming language
b. Random transfer language
c. Register transfer language
d. Arithmetic transfer language
3. The register that includes the address of the memory unit is termed as the :
a. MAR
b. Random transfer language
c. Register transfer language
d. Arithmetic transfer language
3. The register that includes the address of the memory unit is termed as the :
a. MAR
b. PC
c. IR
c. IR
d. None of these
4. In register transfer the instruction register as:
a. MAR
4. In register transfer the instruction register as:
a. MAR
b. PC
c. IR
c. IR
d. None of these
5. How many types of micro operations:
a. 2
5. How many types of micro operations:
a. 2
b. 4
c. 6
c. 6
d. 8
6. Which micro operations carry information from one register to another:
a. Register transfer
6. Which micro operations carry information from one register to another:
a. Register transfer
b. Arithmetic
c. Logical
c. Logical
d. All of these
7. In memory transfer location address is supplied by that puts this on address bus:
a. ALU
7. In memory transfer location address is supplied by that puts this on address bus:
a. ALU
b. CPU
c. MAR
c. MAR
d. MDR
8. Operation of memory transfer are:
a. Read
8. Operation of memory transfer are:
a. Read
b. Write
c. Both
c. Both
d. None
9. Which operation puts memory address in memory address register and data in DR:
a. Memory read
9. Which operation puts memory address in memory address register and data in DR:
a. Memory read
b. Memory write
c. Both
c. Both
d. None
10. In arithmetic operation numbers of register and the circuits for addition at :
a. ALU
10. In arithmetic operation numbers of register and the circuits for addition at :
a. ALU
b. MAR
c. Both
c. Both
d. None
11. Which operation is binary type, and are performed on bits string that is placed in register:
11. Which operation is binary type, and are performed on bits string that is placed in register:
a. Logical micro operation
b. Arithmetic micro operation
c. Both
d. None
b. Arithmetic micro operation
c. Both
d. None
12. Which operation is extremely useful in serial transfer of data:
a. Logical micro operation
b. Arithmetic micro operation
c. Shift micro operation
d. None of these
13. IR stands for:
a. Input representation
b. Intermediate representation
c. Both
d. None
14. VPCC stands for:
a. Variable portable C compiler
b. Very portable C compiler
c. Both
d. None
15. High level language C supports register transfer technique for application:
a. Executing
14. VPCC stands for:
a. Variable portable C compiler
b. Very portable C compiler
c. Both
d. None
15. High level language C supports register transfer technique for application:
a. Executing
b. Compiling
c. Both
c. Both
d. None
16. Which is the straight forward register transfer the data from register to another register temporarily:
a. Digital system
b. Register
c. Data
d. Register transfer operations
17. The binary information of source register chosen by:
a. Demultiplexer
16. Which is the straight forward register transfer the data from register to another register temporarily:
a. Digital system
b. Register
c. Data
d. Register transfer operations
17. The binary information of source register chosen by:
a. Demultiplexer
b. Multiplexer
c. Both
c. Both
d. None
18. Register are assumed to use positive-edge- triggered :
a. Flip-flop
b. Logics
c. Circuit
d. Operation
19. ATA stands for:
18. Register are assumed to use positive-edge- triggered :
a. Flip-flop
b. Logics
c. Circuit
d. Operation
19. ATA stands for:
a. Advance technology attachment
b. Advance teach attachment
b. Advance teach attachment
c. Both
d. None
20. How many parts of memory bus:
a. 2
b. 3
c. 5
d. 6
21. In 3 state gate two states act as signals equal to:
a. Logic 0
20. How many parts of memory bus:
a. 2
b. 3
c. 5
d. 6
21. In 3 state gate two states act as signals equal to:
a. Logic 0
b. Logic 1
c. None of these
c. None of these
d. Both a & b
22. In every transfer, selection of register by bus is decided by:
a. Control signal
22. In every transfer, selection of register by bus is decided by:
a. Control signal
b. No signal
c. All signal
d. All of above
23. DDR2 stands for:
a. Double data rate 2
b. Data double rate 2
c. Dynamic data rate 2
b. Data double rate 2
c. Dynamic data rate 2
d. Dynamic double rate 2
24. Which is referred as a sequential circuit which contains the number of register as per the protocol:
a. RTL
24. Which is referred as a sequential circuit which contains the number of register as per the protocol:
a. RTL
b. RAM
c. MAR
c. MAR
d. All of these
25. Which symbol will be used to denote an micro operation:
a. (^)
25. Which symbol will be used to denote an micro operation:
a. (^)
b. (v)
c. Both
c. Both
d. None
26. Which operation are associated with serial transfer of data:
a. Logical micro operation
b. Arithmetic micro operation
c. Shift micro operation
d. None of these
27. How many types of shift micro operation:
26. Which operation are associated with serial transfer of data:
a. Logical micro operation
b. Arithmetic micro operation
c. Shift micro operation
d. None of these
27. How many types of shift micro operation:
a. 2
b. 4
c. 6
d. 8
28. Which shift is used for signed binary number:
a. Logical
28. Which shift is used for signed binary number:
a. Logical
b. Arithmetic
c. Both
c. Both
d. None of these
29. The variable of hardware register:
a. RAM
29. The variable of hardware register:
a. RAM
b. RTL
c. ALU
c. ALU
d. MAR
30. Shift left is equal to:
30. Shift left is equal to:
a. multiply by two
b. add by two
c. divide by two
d. subtract by two
b. add by two
c. divide by two
d. subtract by two
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